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| NCS6415 Bus-Controlled Video Matrix Switch Description The main function of the NCS6415 is to switch 8 video input sources to the 6 outputs. Each output can be switched to only one of the inputs, whereas any single input may be connected to several outputs. All switching possibilities are controlled through the I2C bus. Features http://onsemi.com MARKING DIAGRAMS* 20 * Cascadable with another NCS6415 (Internal Address can be changed * * * * * * * * * by Pin 7 Voltage) 8 Inputs (CVBS, RGB, Chroma, ...) 6 Outputs with Low Impedance Driver Possibility of Chroma Signal for each Input by Switching off the Clamp with an External Resistor Bridge Bus Controlled 6.5 dB Gain between any Input and Output -45 dB Crosstalk at 5 MHz Compatible with TEA6415C Full ESD Protection These are Pb-Free Devices 20 1 NCS6415 AWLYYWWG SO-20 WB DW SUFFIX CASE 751D A WL YY WW G 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. INPUT1 1 DATA1 2 INPUT2 3 CLOCK 4 INPUT3 5 INPUT4 6 PROG 7 INPUT5 8 VCC 9 INPUT6 10 20 INPUT8 19 GND 18 OUTPUT6 17 OUTPUT5 16 OUTPUT4 15 OUTPUT3 14 OUTPUT2 13 OUTPUT1 12 GND 11 INPUT7 ORDERING INFORMATION Device NCS6415DWG NCS6415DWR2G Package SO-20 (Pb-Free) Shipping 38 Units / Rail SO-20 1000 / Tape & Reel (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2006 1 September, 2006 - Rev. 0 Publication Order Number: NCS6415/D NCS6415 OUTPUT6 OUTPUT4 OUTPUT2 OUTPUT5 OUTPUT3 OUTPUT1 GND 18 17 16 15 14 13 12 INPUT1 1 INPUT2 3 INPUT3 5 INPUT4 6 INPUT5 8 INPUT6 10 INPUT7 11 INPUT8 20 Bus Decoder 2 DATA 7 PROG 4 CLOCK 9 VCC 19 GND Figure 1. Block Diagram The main function of the NCS6415 is to switch 8 video input sources to the 6 outputs. Each output can be switched to only one of the inputs, whereas any single input may be connected to several outputs. The lowest level of each signal is aligned on each input (bottom of sync pulse for CVBS or Black Level for RGB signals). The nominal gain between any input and output is 6 dB. For Chroma signals, the alignment is switched off by forcing, with an external 5` VDC resistor bridge on the input. Each input can be used as a normal input or as a Chroma input (with external resistor bridge). All the switching possibilities are changed through the I2C bus. The switches configuration is defined by words of 16 bits: one word of 16 bits for each output channel. So, 6 words of 16 bits are necessary to determine the starting configuration upon power-on (power supply: 0 to 10 V). But a new configuration needs only the words of the changed output channels. Driving a 75 W load requires an external transistor. http://onsemi.com 2 NCS6415 Table 1. ATTRIBUTES Characteristics ESD Moisture Sensitivity (Note 1) Flammability Rating Oxygen Index: 28 to 34 Human Body Model Machine Model Value 4 kV 400 V Level 3 UL 94 V-0 @ 0.125 in. 1. For additional information, see Application Note AND8003/D Table 2. MAXIMUM RATINGS Parameter Power Supply Voltage Operating Temperature Range Storage Temperature Range Thermal Resistance, Junction-to-Air SO-20 Symbol VCC TA Tstg qJA Rating 12 0 to +70 -60 to +150 30 to 35 Unit V C C C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. DC & AC Characteristics (TA = 25C, VCC = 10 V, RL = 10 kW, CL = 3 pF) Symbol VCC ICC INPUTS Signal Amplitude (CVBS signal) (Note 2) Input Current (per output connected, VIN = 5 VDC) DC Level DC Level Shift (0C to 70C) RIN CIN OUTPUTS Dynamic (VIN = 2.5 VPP) Output Impedance (Note 2) AV BW Gain (Note 2) Bandwidth (Note 2) -1 dB Attenuation -3 dB Attenuation 0.1 dB Gain Flatness (Note 2) Crosstalk DC Level I2C BUS INPUT: DATA, CLOCK AND PROG Threshold Voltage 2. Guaranteed by design and/or characterization. 1.5 2 3 V f = 3.58 MHz f = 5 MHz 2.4 6 7 6 -48 -45 2.75 3.1 5 25 6.5 15 20 MHz dB V 50 7 VPP W dB MHz Input Resistance Input Capacitance 3.3 1.5 1 3.6 5 1 2 2 3 3.9 100 VPP mA V mV MW pF Supply Voltage Power Supply Current (No Load) Parameter Min 8 20 Typ 10 30 Max 11 40 Unit V mA http://onsemi.com 3 NCS6415 Table 4. I2C Bus Characteristics Symbol SCL VIL VIH ILI fSCL tR tF CI SDA VIL VIH ILI CI tR tF VOL tF CL TIMING tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Clock Low Period (Note 4) Clock High Period (Note 4) Data Setup Time (Note 4) Data Hold Time (Note 4) Setup Time from Clock High to Stop (Note 4) Start Setup Time following a Stop (Note 4) Start Hold Time (Note 4) Start Setup Time following Clock Low to High Transition (Note 4) 4.7 4.0 250 0 4.0 4.7 4.0 4.7 340 ms ms ns ns ms ms ms ms Low Level Input Voltage High Level Input Voltage Input Leakage Current Input Capacitance (Note 3) Input Rise Time (Note 3) Input Fall Time (Note 3) Low Level Output Voltage Output Fall Time (Note 3) Load Capacitance 1.5 V to 3 V 3 V to 1.5 V IOL = 3 mA 3V to 1.5 V VI = 0 to VCC -0.3 3.0 -10 +1.5 VCC +0.5 +10 10 1000 300 0.4 250 400 V V mA pF ns ns V ns pF Low Level Input Voltage High Level Input Voltage Input Leakage Current Clock Frequency (Note 3) Input Rise Time (Note 3) Input Fall Time (Note 3) Input Capacitance (Note 3) 1.5 V to 3 V 3 V to 1.5 V VI = 0 to VCC -0.3 3.0 -10 0 +1.5 VCC +0.5 +10 100 1000 300 10 V V mA kHz ns ns pF Parameter Test Conditions Min Max Unit 3. Guaranteed by design and/or characterization. 4. Functionality guaranteed by design and/or characterization. http://onsemi.com 4 NCS6415 I2C Bus Selections The I2C chip address is defined by the first byte. The second byte defines the input/output configuration. Table 5. CHIP ADDRESS BYTE (1ST BYTE OF TRANSMISSION) HEX 86 06 BINARY 1000 0110 0000 0110 Comment When PROG pin is connected to Ground When PROG pin is connected to VCC Input/Output Selection Byte (2nd byte of transmission) Table 6. I2C BUS OUTPUT SELECTIONS Output Address (MSB) 00000 00100 00010 00110 00001 00101 00011 00111 Input Address (LSB) XXX XXX XXX - XXX XXX XXX - Pin 18 Pin 14 Pin 16 Not Used Pin 17 Pin 13 Pin 15 Not Used Selected Output Output is selected by the 5 MSBs. Table 7. I2C BUS INPUT SELECTIONS Output Address (MSB) 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX Input Address (LSB) 000 100 010 110 001 101 011 111 Pin 5 Pin 8 Pin 3 Pin 20 Pin 6 Pin 10 Pin 1 Pin 11 Selected Input Input is selected by the 3 LSBs. Example: 0010 0101 (Binary) or 25 (Hex) connects Pin 10 (input) to Pin 14 (output) SDA tBUF tLOW tSU.DAT SCL tR tHD.STA SDA tSU.STA tHD.DAT tHIGH tF tSU.STO Figure 2. I2C Timing Diagram http://onsemi.com 5 NCS6415 VCC VCC 14 kW x3 0.36 VCC 7 kW Pins 1, 3, 5, 6, 8, 10, 11 and 20 Pins 1, 3, 5, 6, 8, 10, 11 and 20 6 Times 8 NPN Transistors Output 11 kW Figure 3. Input Configuration Figure 4. Output Configuration Pins 2, 4, and 7 VREF 250 mA VCC To I2L Part * 150 W 150 W 20 kW ACK 20 kW *For Pin 2 (Data Only) Figure 5. Bus I/O Configuration Figure 6. VCC Pin Configuration http://onsemi.com 6 NCS6415 USING A SECOND NCS6415 The programming input pin (PROG) allows two NCS6415 circuits to operate in parallel and to select them independently through the I2C bus by modifying the address byte. Consequently, the switching capabilities are doubled, or IC1 and IC2 can be cascaded (see Figure 7). NCS6415 PROG Logical "0" IC1 MCU Video Inputs Video Outputs NCS6415 PROG Logical "1" IC2 Video Inputs Video Outputs Figure 7. Cascaded NCS6415 TYPICAL APPLICATION DIAGRAM NCS6415 is suited for single supply system, running on broadcast studio quality signals. The layout is not as critical a single +10 V supply. The high quality of the output stage to the design and it can be easily realized on a single sided and excellent linearity provides video signal comparable to board. Additional Video Inputs 18 17 16 15 14 13 Output 6 Security Video Interface Outpu 1 Screen S TV receiver circuit 1 Input 1 3 5 6 8 10 11 20 Input 8 VCR Additional Video Outputs HDTV Receiver circuit VCC Microcontroller Figure 8. Typical Application Diagram http://onsemi.com 7 Clock Data Prog NCS6415 Bus Decoder +10V R41 68W R40 75W +10V R39 10kW Output 6 R38 470W R37 10kW C1 INPUT1 R42 75W R32 10kW R33 470W Input 8 DATA INPUT2 CLOCK INPUT3 INPUT4 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 GND INPUT8 R1 100nF R2 100W C2 R3 100nF R4 100W C3 75W 75W Input 1 1 20 C12 100nF SDA 2 19 18 17 16 15 14 PROG OUTPUT2 R36 68W R35 75W Output 5 R35 10kW +10V R31 68W R30 75W R27 10kW R28 470W Output 4 R30 10kW +10V R23 470W +10V R26 68W R25 75W Input 2 3 4 5 6 7 SCL Input 3 R5 100nF C5 R6 75W C6 R8 100nF 75W VCC INPUT6 INPUT7 GND C8 R9 100nF 75W C10 10mF C9 100nF INPUT5 OUTPUT1 100nF 75W NCS6415 Input 4 Figure 9. Typical Application Circuit http://onsemi.com 8 9 10 11 C11 100nF 8 13 12 R11 75W Input 5 Input 7 Input 6 R21 R18 68W 470W +10V R12 470W R16 68W R17 10kW R22 10kW Output 3 R24 10kW R20 75W Output 2 R19 10kW R15 75W R13 10kW R14 10kW Output 1 VCC = +10V NCS6415 PACKAGE DIMENSIONS SO-20 WB CASE 751D-05 ISSUE G D A 11 X 45 _ q NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ H M B M 20 10X 0.25 E 1 10 20X B 0.25 M B TA S B S A SEATING PLANE h 18X e A1 T C ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative L http://onsemi.com 9 NCS6415/D |
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